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Silicon Packaging Pathfinding Architect

San Francisco, CA Full Time Posted by: Intel Posted: Wednesday, 15 May 2024
 
Job Details:Job Description: About Logic Technology DevelopmentTechnology Development (TD) is the heart and soul of Moore's Law at Intel. TD has enabled Intel to create world-changing technology that enriches the lives of every person on earth.

TD's more than 13,000 employees drive breakthrough research, develop next generation process and packaging technologies, while also running high volume manufacturing operations in its state-of-the-art facilities in Oregon and Arizona.Logic Technology Development - LTD delivers programs and modules to ramp new process nodes, supports HVM and provides a predictable technology cadence for Intel customers.About the RoleIntel is in the midst of an exciting transformation, with a vision to create and extend computing technology to connect and enrich the lives of every person on Earth.

To do this it requires focused enthusiastic leaders. Join LTD and help create the next generation of technologies that will touch the lives of people the world over for decades to come.Foveros Direct or Hybrid Bond Interconnect (HBI) is one of the cutting edge advanced packaging technology at Intel.

This job is an opportunity to be part of pathfinding team in LTD that will take this exciting and challenging packaging technology to development and eventually to Intel products in near future. Hybrid bond interconnect technology has multiple flavors based on product application and maturity timeline. Your role will involve owning one of the swim lanes and be the leader who directs multi-disciplinary teams across technology, packaging and design on choosing technology options, execution of integrated experiments and down-selection of path that has maximum chance of being high yielding, affordable option for development.

Your responsibilities and expectations will include:Detailed understanding of product, technology and roadmap needs for HBI and other advance packaging swim lanesDo your own research, comprehend industry trends in advanced packaging, come up with innovative approaches to build packages with HBI and other advanced packaging technologies.Once you have clear understanding of what needs to be done, you are expected to clearly articulate technology options, technical and schedule risks and an executable plan to assess these options.One of the expectations before you present any plans is to bring partner teams along with you in aligning to your plan.

You will need to work with design, packaging and various teams in LTD to ensure that everyone is aligned to the plan.Crisp execution of the plan with timely escalations on things that are falling behind and need management help.You are expected to make timely decisions.

This will involve both daily decisions on priorities for the execution of swim lanes you own, selecting or dropping options once data is available or making course corrections based on data, industry intelligence or product need changes.You will be responsible for assessing state of the program from time to time that will not only include performance against schedule but will also involve ensuring there are enough resources available to meeting program's expectations.Ultimate success for this role will involve down selecting an option or couple of options that will meet architecture plan, technical requirement and schedule criteria and will be passed on to development.

The candidate should also exhibit the following behavior traits/skills:Analytical and problem-solving skillsInfluencing and stake holder management skillsCollaboration and building and strengthening internal and external partnershipsTechnical and operational leadershipProven track record of innovations and pushing technology boundariesA learning pre-disposition and desire to connect observation with physical fundamentalsInitiative, resourcefulness and ability to work independentlyWillingness to build partnerships across broad set of organizations and collaborate effectivelyExecutive communication and attention to detailPlan and act when faced with ambiguityPlanning and execution to timelineQualifications:Master's degree or PhD degree in engineering disciplines 10+ years of technology research or development experience in Semiconductor fabrication techniques, Experience in Microelectronic Assembly and Packaging or Si Fabrication or a relevant field.Job Type:Experienced HireShift:Shift 1 (United States of America)Primary Location: US, Oregon, HillsboroAdditional Locations:US, California, San Francisco, US, Texas, AustinBusiness group:As the world's largest chip manufacturer, Intel strives to make every facet of semiconductor manufacturing state-of-the-art - from semiconductor process development and manufacturing, through yield improvement to packaging, final test and optimization, and world class Supply Chain and facilities support. Employees in the Technology Development and Manufacturing Group are part of a worldwide network of design, development, manufacturing, and assembly/test facilities, all focused on utilizing the power of Moore's Law to bring smart, connected devices to every person on Earth.

Posting Statement:All qualified applicants will receive consideration for employment without regard to race, color, religion, religious creed, sex, national origin, ancestry, age, physical or mental disability, medical condition, genetic information, military and veteran status, marital status, pregnancy, gender, gender expression, gender identity, sexual orientation, or any other characteristic protected by local law, regulation, or ordinance.Position of TrustThis role is a Position of Trust. Should you accept this position, you must consent to and pass an extended Background Investigation, which includes (subject to country law), extended education, SEC sanctions, and additional criminal and civil checks.

For internals, this investigation may or may not be completed prior to starting the position. For additional questions, please contact your Recruiter.Benefits:We offer a total compensation package that ranks among the best in the industry.

It consists of competitive pay, stock, bonuses, as well as, benefit programs which include health, retirement, and vacation. Find more information about all of our Amazing Benefits here: Annual Salary Range for jobs which could be performed in US, California:$186,760.00-$299,166.00Salary range dependent on a number of factors including location and experience.

Work Model for this RoleThis role will be eligible for our hybrid work model which allows employees to split their time between working on-site at their assigned Intel site and off-site. In certain circumstances the work model may change to accommodate business needs.SummaryLocation: US, Oregon, Hillsboro; US, Texas, Austin; US, California, San FranciscoType: Full time.

San Francisco, CA, USA
Logistics
Intel
AJF/707484283
15/05/2024 01:29

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